By Jianhua Tang and Yingqun Hua, Jiangsu University, China
The charge balance analogue-to-digital (A/D) converter is a well-known high accuracy device, widely used in load cells measurement circuits; a load cell is a transducer which outputs an electrical signal with a magnitude directly proportional to the force being measured. However, the traditional charge balance A/D suffers when its input signal is close to the reference, making it unstable. Many are focusing on improving this problem, and here we discuss a design theory of an improved converter used for load cell measurement circuits, that is stable when its input signals are close to the reference.
The improved converter is identical to the traditional version except for one important attribute. Figure 1 shows the improved charge balance technique. The one component that differs from that of the traditional converter is the voltage vramp used as comparator reference. The traditional converter uses a constant voltage of zero volts as reference, whereas vramp in the improved converter is a sawtooth waveform; see Figure 2. The slope of the ramp voltage is denoted by mramp.
In all aspects other than the comparator reference voltage, the rules of operation of the improved converter are the same as in the traditional type. In both converters the integrator capacitor is charged and discharged by isig and Iref during two phases, and the magnitude of the input voltage is determined from the measured lengths of the charging and discharging times. In the improved converter, however, the transition between phases one and two occurs when the falling vout ramp crosses the rising vramp ramp, rather than when vout reaches zero. Figure 3 shows a typical conversion cycle. Variables viand vf represent the initial and final values of vout for a single conversion cycle, whereas variable tx is the length of phase one, with the total length of the conversion cycle being T0. The value of vout at the transition between phases is denoted by vx…