CEA-Leti is scaling ferroelectric RAM (FeRAM) to the 22nm manufacturing node, harnessing a novel 3D capacitor architecture. The breakthrough should remove the longstanding density barrier that has kept FeRAM from competing with volatile memory. It also promises to enable faster, more energy-efficient AI at the edge.
By vertically integrating ferroelectric capacitors made from hafnium zirconium oxide (HZO) thin films, the team achieved memory cells that are 2.5 times smaller than standard SRAM at the same 22nm node, matching the density of SRAM at the much more advanced 10nm node. Moreover, unlike SRAM, FeRAM retains data without power, combining non-volatility with a density previously attainable only by volatile memory.
Historically, FeRAM fabrication was constrained to flat, planar capacitor structures that limited how small and dense memory cells could be manufactured. In these architectures, the capacitor – not the selection transistor – determines the cell footprint because the current flowing through the capacitor during memory operations is inherently low. To overcome this physical limit, CEA-Leti shifted to a vertical architecture, building the capacitor upwards rather than outwards.
The team demonstrated two back-end-of-line (BEOL) integration schemes for 3D ferroelectric capacitors (FeCaps) at 22nm, utilizing advanced patterning and deposition techniques. Array functionality with Gaussian bit distributions was confirmed down to 0.047 μm² 1T-1C FeRAM bitcells operating at just 1.3V, featuring a standard logic selector and a 3D FeCap with an aspect ratio of roughly 4:1.
CEA-Leti plans to integrate the demonstrated high-aspect-ratio ferroelectric capacitors into dense FeRAM arrays on a 22nm FDSOI platform, aiming to achieve the highest-performance embedded FeRAM to date.
