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Vision-Based System Design Part 11 – Securing Embedded Vision Systems against Malicious Attackers

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Following the initialisation of the IP blocks the applications software performs the following:
• Configures the FLIR Lepton to perform automatic gain control.
• Synchronises with the VoSPI data to detect the start of a valid frame.
• Applies a Digital Zoom to scale up the image to utilise efficiently the 800 pixels by 480-line display. This can be achieved by outputting each pixel either 8 or 4 times depending upon the sensor selection.
• Transfers the frame to the DDR Memory. As the FLIR Lepton only outputs 8-bit data when ACG is enabled, this is mapped to the green channel of the RGB display.
When the completed programme is executed on the MiniZed with the FLIR Lepton connected and outputting to a 7-inch touch sensitive display, the output of the FLIR can be seen very clearly.

Wrapping Up
Imaging outside the visible range provides significant benefits and is used across several applications, although each application requires careful selection of the sensor technology. This article has demonstrated how an uncooled thermal imaging solution can be quickly and easily created using a cost-optimised Zynq SoC designed with Xilinx IP cores.
You can find the reference design here

For more information, please visit: http://www.xilinx.com/products/design-tools/embedded-vision-zone.html

 

 

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