Mainstream FPGAs and SoC FPGAs continue to drive to the largest number of designs in a wide variety of applications. However the definition of mainstream FPGAs continues to evolve and devices which were appropriate for mainstream applications yesterday fail to satisfy the needs of todays rapidly evolving applications. Todays mainstream FPGAs typically fall in the capacity range below 150K logic elements. This capacity range can implement sufficient custom functionality required of the majority of mainstream target applications without exceeding cost or power design constraints. When combined with the right selection of dedicated ‘hard’ logic mainstream devices can offer a more attractive combination of capacity, features, performance, low-power and lower total cost of ownership to address the bulk of programmable designs.
The dedicated functions that are most desired in todays mainstream applications include features like on-chip SRAM and Flash blocks; arithmetic functions for improving numeric computations like those for digital signal processing; high-speed serial interfaces and protocol specific logic; DDR memory controllers; and embedded Microcontroller Subsystems. The selection of the dedicated logic elements on a mainstream device can be a difficult balancing act. However, adding functionality not used by the majority of applications will increase the cost without sufficient advantages. Not putting in the right dedicated blocks means that most designs will use more programmable fabric, increasing cost and power requirements.
One solution to this dilemma is to develop multiple device families targeted for different applications requirements. If a common platform can be used for multiple families the FPGA manufacturer can leverage this infrastructure while more efficiently addressing multiple target markets. Microsemi’s approach to the FPGA mainstream market illustrates this type of strategy with the IGLOO2 FPGA and SmartFusion2 SoC FPGA families. Both these device families leverage Microsemi’s established on-chip Flash-based non-volatile FPGA fabric. This fabric uses an efficient four-input Look Up Table (LUT4) architecture with block/distributed RAM, DSP blocks and 5G SERDES and with up to 150K logic elements brings these devices into the mainstream application space. The selection of dedicated functions on the two families is different however and thus they target different application segments.
One of the most common mainstream FPGA application areas is for bridging multiple dissimilar interfaces. This is the modern ‘glue logic’ application for programmable devices and is probably the single most common type of design. Key requirements for a mainstream FPGA in these applications are a large number of high-speed serial ports and sufficient on-chip and off-chip memory bandwidth to keep up with the serial port requirements. Microsemi has architected IGLOO2 devices to target these types of applications by starting with the above described fabric and then adding 5G SERDES along with dedicated logic to support common protocols. A unique high-performance memory subsystem is also included that provides 64KB of on-chip SRAM, up to 512KB on-chip non-volatile Flash memory, and up to two high-speed LPDDR/DDR2/DDR3 memory controllers.
Example Mainstream FPGA-Microsemi’s IGLOO2 FPGA
Another large segment of the mainstream market requires not only the data storage and movement capabilities previously describe, but also significant control and computation capabilities. In these applications data must also be operated on for tasks like packet inspection, audio or video processing, sensor measurement or a host of other operations. Complex decisions may need to be made that are more appropriate for an MCU to manage. A common approach, like that taken by Microsemi with SmartFusion2 is to add a full featured ARM Cortex-M3 based Microcontroller subsystem. The Microcontroller subsystem is an efficient method for implementing control functions and can also provide significant computational capability. FPGA fabric can even be used for hardware acceleration if additional data processing bandwidth is required.
The Best In-Class Mainstream SoC FPGA-Microsemi’s SmartFusion2 SoC FPGA
FPGA families that build on a common architecture to address different applications segments using different dedicated blocks is the way forward. This strategy can be used to successfully satisfy competing mainstream FPGA requirements as they no doubt will evolve and change over the next several years.
