“ARM, the world’s leading semiconductor intellectual property (IP) supplier, has reduced the time and cost of developing its range of RealView development tools by using the XJTAG boundary scan development system to improve and speed up the process of debugging and testing its high density, multi-layer development boards.”
ARM® technology lies at the heart of advanced digital products from mobile, home and enterprise solutions to embedded and emerging applications. ARM’s comprehensive product offering includes 16/32-bit RISC microprocessors, data engines, graphics processors, digital libraries, embedded memories, peripherals, software and development tools, as well as analogue functions and high-speed connectivity products.
To support the company’s SoC IP, ARM has developed a strong base of development tools, software and hardware products. For example, its range of RealView® development solutions are ideal systems for customers prototyping ARM processor-based products and are suitable for architecture and CPU evaluation, hardware and software design, and ASIC emulation. These development platforms are typically highly complex, high density, twelve-to-sixteen layer board designs, containing multiple high pin-count ball grid array (BGA) devices including processors, ASICs, FPGAs and CPLDs.
“Our development platforms are used extensively across the business and are designed to deliver significant risk reduction and faster time-to-market benefits to our Partners,” said Spencer Saunders, engineering manager, platforms, Development Systems, ARM.
“With tens of thousands of pins on each board, we recognized that it would not be possible to validate these circuits in a commercially realistic timescale without the use of a boundary scan test system.”
After evaluating the different competitive options, the engineering team at ARM’s development facility in Cambridge, UK, selected the XJTAG boundary scan development system. The XJTAG system has enabled ARM to speed up the process of debug and test, get test coverage up to around the 90 percent mark and to significantly improve production yields.
“XJTAG offers incredible power, performance and versatility and can test both boundary scan (JTAG) and cluster (non-JTAG) devices including BGA and chip scale packages,” said Andy Evans, senior product engineer, platforms, Development Systems, ARM.
“XJTAG is easy to use, the test scripts for non-JTAG devices follow the familiar top down design flow, and these test scripts are devicecentric, making them re-usable from project to project, which saves ARM an awful lot of time.”
ARM is currently using XJTAG on its latest generation of RealView platform baseboards, and, because of its built-in design-for-test (DFT) functionality, it has been used right from the very beginning of the design process to help improve the design and reduce respins.
“XJTAG’s DFT capability is extremely powerful and saves us a great deal of time, as it automatically handles any netlist changes by adapting to the new circuit connections, thereby avoiding the time-consuming process of manually picking through the netlist for errors,” said Spencer Saunders.
“In addition, XJTAG’s powerful circuit visualization tool provides us with a simple graphical view of the state of all JTAG pins across the multiple BGA devices and enables us to quickly pinpoint specific faults on our boards and speed up the whole debug process.”