Cadence Design Systems

12 December 2008 09:44

Cadence unveils next-generation parallel circuit simulator for the verification of complex analog and mixed-signal IC designs

Cadence Design Systems, a specialist in global electronic design, has announced the availability of Cadence Virtuoso Accelerated Parallel Simulator (APS), its next-generation circuit simulator, with the full accuracy of the industry reference Virtuoso Spectre Circuit Simulator, developed to

17 November 2008 16:35

Cadence announces development of OVM verification IP for USB 3.0 and PCI Express 3.0 high-speed protocols

Cadence Design Systems has today announced the planned first quarter 2009 availability of new Open Verification Methodology (OVM) verification IP (VIP) for two key high-speed protocols: USB 3.0 and PCI Express 3.0. The new Cadence VIP will help

23 October 2008 09:46

Cadence Helps Staccato Launch Ripcord2 Single-Chip, Ultra-Wideband IC Family

Cadence Design Systems has announced that Staccato Communications utilized the Cadence Low-Power Solution to achieve the aggressive power budget requirements for its 65-nanometer CMOS Ripcord2 family of WiMedia Ultra-Wideband (UWB) devices. The mixed-signal, low-power, single-chip Ripcord2 family combines

17 October 2007 16:04

Cadence Announces Academic Network to Promote Electronic Design Competency in Europe

Cadence Design Systems, a leader in global electronic-design innovation, has today announced the formation of an academic network in Europe to promote the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence. This