New SonicsSX with IMT SMART Interconnect Solution Solves Memory Bandwidth Problem for High Quality High Definition Video SoCs
Sonics, a premier supplier of system-on-chip (SoC) SMART Interconnect solutions, today
announced the availability of the SonicsSX with IMT SMART Interconnect solution. Designed for SoCs requiring high quality high definition, or HQHD, video support, SonicsSX eases subsystem development and global integration of the subsystems onto a single chip. The addition of Sonics' new Interleaved Multchannel Technology, or IMT, is also provided to improve overall shared memory bandwidths. IMT enables SoC architectures to seamlessly transition from single to multiple DRAM channels, or multichannel, while automatically balancing the traffic among the channels and operates transparently to software and other hardware. To improve image quality and support higher resolutions, HQHD video requires the adoption of upgraded video protocols, more image resolution enhancement, and scaling up to 120Hz. This is causing a shift towards utilizing matched groups of processors and supporting elements, or subsystems, that supply the on-chip processing required to achieve HQHD video performance. The transition to subsystems means that SoC architectures must now become hierarchical. Interconnects within the subsystems are needed to support the local data throughput requirements of the subsystems, and a global interconnect is required for subsystem integration onto a single chip and to manage the global data throughput requirements. Increased processing and subsystem integration complexities result in the need to significantly increase external memory access bandwidth, which is now the primary design challenge for HQHD video SoCs.
SonicsSX is built on the proven architecture of previous SMART Interconnect solutions. It contains all the advanced fabric features and data flow services, such as universal IP core connectivity, non-blocking multithreaded data flow, and power, security and system error management, that are presently powering over 250 million production SoCs containing other SMART Interconnect solutions such as SonicsMX and SonicsLX.
To address increased processing for HQHD, SonicsSX offers higher operating clock frequencies and adds native support for 2D data transactions and an expanded data bus to 256 bits. This allows the interconnect data bandwidths to increase from the 2-4 gigabytes per second required for high definition video, to up to 16 gigabytes per second for HQHD video.
To improve global shared memory access bandwidth, SonicsSX adds network-on-a-chip capabilities and also contains IMT, which enables SoC developers to transition their architectures from single to multiple DRAM channels, while avoiding the complexities associated with multichannel memory management. IMT utilizes an innovative memory interleaving methodology as a foundation for managing up to eight external DRAM channels. User-controlled interleaving addresses the key challenge associated with adopting multichannel architectures, ensuring that the memory traffic is divided evenly among the channels.
SonicsSX is also compatible with the practical Globally Asynchronous Locally Synchronous (GALS) approach that is part of the SMART Interconnect solution. Practical GALS enables SoC developers to extend the capabilities of SonicsSX to include voltage and domain isolation on an IP core or subsystem basis, which further facilitates low power and higher performance. Practical GALS does not disturb SoC design flows, which is typically the case when implementing asynchronous functionality.
"SoC architecture is at a major inflection point. Almost all high volume SoCs must move to HQHD," said Drew Wingard CTO, Sonics. "But the massive complexities associated with a transition to HQHD means that more conventional architecture approaches will have to be abandoned because they will not reach the memory performance requirements. SonicsSX with IMT offers a flexible low overhead approach to reaching HQHD memory performance, while eliminating the complexities of multichannel memory management design. Easy access to IMT within the well-proven SMART Interconnect solution approach provides a seamless transition to multichannel memory management and hierarchical SoCs."
SonicsSX with IMT SystemC models are available for advanced architecture modeling. As a member of the SMART Interconnect family, advanced RTL configuration and automation through SonicsStudio enables SoC developers to complete data flow analysis for SonicsSX with IMT during the architecture phase of a product development cycle. This allows SoC developers to realize predictable high performance data flows, including those related to the multichannel memory subsystem, before the hardware and software development phases begin.
Share this article with others
Post to del.icio.us
Printed from http://www.electronicsworld.co.uk/news/11497/New_SonicsSX_with_IMT_SMART_Interconnect_Solution_Solves_Memory_Bandwidth_Problem_for_High_Quality_High_Definition_Video_SoCs.html
Comment on this article
Skip to comments
We encourage users to analyse, comment on and even challenge Electronics World's articles, including the one above - 'New SonicsSX with IMT SMART Interconnect Solution Solves Memory Bandwidth Problem for High Quality High Definition Video SoCs'
User reviews and comments that include profanity or personal attacks or other inappropriate comments or material will be removed from the site.
Additionally, entries that are unsigned or contain "signatures" by someone other than the actual author will be removed. We will take steps to block users who violate any of our posting standards, terms of use or privacy policies or any other policies governing this site.